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Process Preparation for PCB Assembly and Test

Siemens Valor Process Preparation is a complete engineering solution for PCB assembly operations. It improves new product introduction with front-end BOM validation, DFA/DFT analysis, panelisation, product documentation, stencil design, as well as central part library management and program generation for SMT, Test and Inspection equipment.

With a single central database of engineering data based on import of ODB++, native CAD, and BOM files with fully configurable manufacturing process definitions, Process Preparation ensures automated, error-free set-ups and outputs for PCB assembly, test and inspection, right first time, in half the normal time.

Streamline engineering tasks with production-optimised data.

Data Preparation

The Data Preparation function supports a wide set of CAD and CAM data formats to create PCA data. Featuring: Complex BOM file support, a central master vendor part library (VPL), test, and inspection processes, common product data model and a highly streamlined, repeatable work flow.

SMT Multi-Vendor Programming
& Part Data Management

SMT programming allows central programming for all supported machine models, including: part data models, Virtual Sticky Tape, offline process simulation, auto-generation option and a multi-vendor line.

Inspection Programming

Using the Inspection Programming function machine-specific automated optical inspection (AOI) and automated optical x-ray inspection (AXI) output files on supported platforms can be created centrally.​

It optimises the product data model during the DFx analysis, to support test and inspection programming.

Stencil Design

The Stencil Design function optimises stencil design, reduces errors and shortens the review cycle between the manufacturer and the stencil supplier.

It uses the same common datasets as other Process Preparation functions; ensuring a streamlined, error-free workflow. In addition to creating the paste stencil, it will also save the design to ODB++ or RS-274X Gerber files.

DFA/DFT Analysis

DFA & DFT Analysis consist of a group of manufacturing and testing focused checks to ensure 'first time right' assembly and testing of  single PCBs and PCB panels.

BOM Connector

BOM Connector is the most complete BOM tool on the market for electronic manufacturing, greatly easing the tasks of loading, preparing, scrubbing, formatting, checking and comparing of BOM data 

BOM Connector helps you create more accurate quotes much quicker and provides a powerful database “backend” to track and reuse your work for future projects. 

Documentation for Manual Assembly, Test & Inspection

The Documentation function creates clear work instructions for assembly processes. It eliminates production process errors by synchronising each SMT, THT and hand-assembly process to its corresponding work instruction, and automatically updates. Documents can be output as read-only PDF sets, or as an interactive document viewed on screen. 

Test Programming

Using the Test Programming function machine-specific ICT and FPT output files for supported platforms  can be created.

The optional fixture reuse feature performs automated analysis of fixture files on new revisions of a PCB, determining which test probes can be altered.

White Paper

Valor BOM Connector - Product White Paper

White Paper

Digital Industries Software: The pressure is on for test engineers

Brochure

DFM for designing better quality PCBs using the Valor Parts Library

Brochure

Optimizing New Product Introductions

Brochure

Complete Engineering Solution for PCB Assembly and Test

Brochure

Steps for ensuring PCB assembly success

Brochure

Virtual parts for optimizing the PCB manufacturing process

Video

VIDEO: Siemens Valor Process Preparation Case Study: Escatec

  • The Data Preparation function supports a wide set of CAD and CAM data formats to create PCA data. Featuring: Complex BOM file support, a central master vendor part library (VPL), test, and inspection processes, common product data model and a highly streamlined, repeatable work flow.

  • SMT programming allows central programming for all supported machine models, including: part data models, Virtual Sticky Tape, offline process simulation, auto-generation option and a multi-vendor line.

  • Using the Inspection Programming function machine-specific automated optical inspection (AOI) and automated optical x-ray inspection (AXI) output files on supported platforms can be created centrally.​

    It optimises the product data model during the DFx analysis, to support test and inspection programming.

  • The Stencil Design function optimises stencil design, reduces errors and shortens the review cycle between the manufacturer and the stencil supplier.

    It uses the same common datasets as other Process Preparation functions; ensuring a streamlined, error-free workflow. In addition to creating the paste stencil, it will also save the design to ODB++ or RS-274X Gerber files.

  • DFA & DFT Analysis consist of a group of manufacturing and testing focused checks to ensure 'first time right' assembly and testing of  single PCBs and PCB panels.

  • BOM Connector is the most complete BOM tool on the market for electronic manufacturing, greatly easing the tasks of loading, preparing, scrubbing, formatting, checking and comparing of BOM data 

    BOM Connector helps you create more accurate quotes much quicker and provides a powerful database “backend” to track and reuse your work for future projects. 

  • The Documentation function creates clear work instructions for assembly processes. It eliminates production process errors by synchronising each SMT, THT and hand-assembly process to its corresponding work instruction, and automatically updates. Documents can be output as read-only PDF sets, or as an interactive document viewed on screen. 

  • Using the Test Programming function machine-specific ICT and FPT output files for supported platforms  can be created.

    The optional fixture reuse feature performs automated analysis of fixture files on new revisions of a PCB, determining which test probes can be altered.

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